Electrical Engineering Archive: Questions from 2023-02-10

Consider the CMOS inverter pair in Figure P16.34. Let VTN = 0.8 V, VTP = -0.8 V, and Kn = Kp . (a) If vO1 = 0.6 V, determine vI and vO2. (b) Determine the range of vO2 for which both N2 and P2 are biased in the saturation region.

The transistor parameters in the CMOS inverter are VTN = 0.35 V, VTP = -0.35 V, k'n = 80 uA/V2, and k'p = 40?A/V2. Let VDD = 1.8 V. (a) Determine the peak current in the inverter during a switching cycle for (W/L)n = 2 and (W/L)p = 4. (b) Repeat part (a) for (W/L)n = 2 and (W/L)p = 6. (c) Repeat part (a) for (W/L)n = (W/L)p = 4.

A CMOS inverter is biased at VDD = 3.3 V. The transistor threshold voltages are VTN = +0.4 V and VTP = -0.4 V. Determine the peak current in the inverter and the input voltage at which it occurs for (a) (W/L)n = 3,(W/L)p = 7.5; (b) (W/L)n = (W/L)p = 4; (c) (W/L)n = 3, (W/L)p = 12.

Consider a CMOS inverter. (a) Show that when vI ~= VDD , the resistance of the NMOS device is approximately 1/[k