Please design a CMOS circuit that realizes the following logic function with a 5V logics. Z = (AB+C)D+E. a) Using static CMOS circuits with fewest number of transistors. b) For the following device parameters, unCox = 45u A/V2 , upCox = 20u A/V2 VTN = 1 V , VTP = -1.2 V. Use all Wn/Ln = 10u/1u for NMOS transistors and L= 1 um for PMOS devices. For a simultaneous switching of all inputs switching threshold needs to be Vth = 2.4 V. For such a result. What should be the width of the PMOS transistors? c)For the same circuit what is the ratio of fastest to slowest output change tpHL(Max) / tpHL(min).