Determine voltage gain and output resistance in following source-followers. Assume M1 and M2 are in saturation, and use gm1, r01 and gm2, r02 for their small-signal parameters. (a) (b)
Consider the circuit shown below, all the transistors have on-resistance of 5k. Assume all the capacitors and the output Y are initially pre-charged to Vdd. Identify the logic states of the inputs for the worst-case (highest) output fall time, and use Elmore delay method to calculate the output fall time
Consider the circuit shown below, having an output F and inputs A and B. Suppose that all NMOS transistors are identical and all PMOS transistors are identical. Equivalent resistor for an NMOS transistor: RN = 8 kohm Equivalent resistor for a PMOS transistor: Rp = 24 kohm Suppose that each circuit node (Hint: output node and the node between transistors having A and B inputs) has an equivalent capacitance value of 1pF. Calculate the worst-case propagation delays, tPLH and tPHL (total of 2 values).
For the circuit below, the transistor parameters are lambda1 = lambda2 = 0. Make an ac analysis to prove the following expression describing the overall small-signal voltage gain: Av = vo/vi Note: You should use the 'Hybrid- ? model'.
7.15 An NMOS differential pair is biased by a current source I = 0.2 mA having an output resistance RSS = 100 kΩ. The amplifier has drain resistances RD = 10 kΩ, using transistors with kn'W/L = 3 mA/V2, and ro that is large. (a) If the output is taken single-endedly, find |Ad|, |Acm|, and CMRR. (b) If the output is taken differentially and there is a 1% mismatch between the drain resistances, find |Ad|, |Acm|, and CMRR.
Assume that the transtonductances of all the transistors in this problem to equal to gm and the output resistance is ro. Here, Vb1 and Vb2 are DC bias voltages. Clearly show your work (a) points) Assume that M1, and M2 are in saturation Using small-signal analysis, derive the output resistance (Ro) in the circuit shown below. Show all steps and the equivalent circuit used. (b) (3 points) using the results from part (a), find the small signal-gain of the amplifier shown below.
Find concise expressions for small-signal gain (Av) for the amplifiers shown below in terms of parameters gm1, gm2, ro1, ro2, Ro, etc. Here, Vb1, Vb2 etc. are DC bias voltages. (Assume that all transistors are in saturation and ). Show your work for full credit.
The NMOS transistor in Fig. 1 has W/L = 1.08 um/ 0.18 um, resistor RD = 5 kohm, supply voltage VDD = 1.8 V, and the gate voltage, VG1 = 0.8 V. Solve the drain current ID and voltage Vout . Verify the region of operation of the transistor.
Consider an n-type MOSFET with an oxide thickness tox = 20 nm (Er = 3.9) and a gate length, L = 1 micron, a gate width, W = 10 micron and a threshold voltage, VT = 1 Volt. Calculate the capacitance per unit area of the oxide, COX, and from it the capacitance of the gate, CG. Calculate the drain current, ID, at a gate-source voltage, VGS = 3 Volt and a drain-source voltage, VDS = 0.05 Volt. The surface mobility of the electrons un = 300 cm2/V-sec. Use the linear model of the MOSFET.