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  • Electrical Engineering Archive: Questions from 2023-08-16

    In the circuit of Fig. 3.4(a), assume that (W/L)1 = 50/0.5, RD = 2 kΩ and λ = 0. (a) What is the small-signal gain if M1 is in saturation and ID = 1 mA? b) What input voltage places M at the edge of the triode region? What s the small-signal gain under this condition? (c) What input voltage drives M1 into the triode region by 50 mV? What is the small-signal gain under this condition? Figure 3.4 (a) Common-source stage, (b) input-output characteristic, (c) equivalent circuit in the deep triode region, and (d) small-signal model for the saturation region.

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    For an NMOS differential pair with a common-mode voltage VCM applied, as shown in Fig. 9.2, let VDD = VSS = 1.0 V, kn' = 0.4 mA/V^2, (W/L) 1,2 = 10, Vtn = 0.4 V, I = 0.16 mA, RD = 5kohm, and neglect channel-length modulation. (a) Find VOV and V GS for each transistor. (b) For V CM =0, find VS, ID1, ID2, VD1, VD2, and VO. (c) Repeat (b) for VCM = +0.4 V. (d) Repeat (b) for VCM = -0.1 V (e) What is the highest value of VCM for which Q1 and Q2 remain in saturation? (f) If current source I requires a minimum voltage of 0.2 V to operate properly, what is the lowest value allowed for VS and hence for VCM (g) What is the input common-mode range?

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    The NMOS transistor in the following circuit has Vt = 0.4 V and kn = 4 mA/V2. The voltage at the source and the drain are measured and found to be -0.55 V and +0.1 V respectively. What current ID is flowing, and what must the values of RD and RS be? What is the largest value for RD for which ID remains unchanged?

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