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  • Electrical Engineering Archive: Questions from 2023-09-4

    D 8.1 Using two matched MOS transistors with W/L = 10, kn' = 400 uA/V

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    For the amplifier shown below, determine: a) the expression for iD(t) b) the expression for vD(t) c) the impedance seen by the signal. d) the impedance seen by the RLoad Assume the amplifier is working in the midband frequency range. Data: VDD = 10 V R1 = 330 kohm R2 = 1.8 kohm R3 = 270kohm R4 = 1.2kohm RL = 3.6kohm Vm(t) = 5sin(5,000*pi*t) mV MOSFET kn'(W/L) = 100 mA/V2 Vt =1.9 V

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    (a) Estimate the equivalent device widths of the following logic gate assuming the best case. (b) When the unit PMOS (W/L = W) and the unit NMOS (W/L = W) have the same strength, how can you make the switching threshold voltage of the circuits VDD/2? (Consider both worst case and best case)

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    Estimate the switching threshold level of an inverter, 2-input NAND, 2-input NOR, 3-input NAND, and 3-input NOR using the following pMOS and nMOS parameters. Use the best case when estimating the equivalent widths. pMOS Vtp = -0.6 V upCox = 30 uA/V^2 (W/L)p = 6 nMOS Vtn = 0.6 V unCox = 60 uA/V^2 (W/L)n = 3 VDD = 2.5 V

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