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  • Electrical Engineering Archive: Questions from 2023-10-11

    Consider 2 single MOS switches sized 2um/1um, and the capacitance at the Vo node is 40 fF. The device technological parameters are given as unCox = 4upCox = 40 uA/V2, |gamma| = 0.5 V1/2, 2phif = 0.5 V, lambda = 0.02 V-1, Vtno = 0.6 V, and Vtpo = -0.8 V, VDD = 3.3 V. The average current method can be used for delay estimation. (1) Find the time interval t1 = t1 - to, the time required for Vo to change from VDD to VDD/2, when the switch is a PMOS, as illustrated in Fig. 1 , and Vo(t>>to) in DCSS. (2) Find t2 = tb - ta, the time required for Vo to change from 0.5VDD to 0.1VDD, when the switch is the NMOS, as illustrated in Fig. 2.

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    Given the mosfet parameters in the common source amplifier shown: For NMOS: For PMOS: VTH = 0.4V VTH = -0.4V unCox = 200uA/V2 upCox = 100uA/V2 = 0.1V-1 = 0.2V-1 a) Compute VSG2 and ID. Don't ignore the effect of Ans. 0.5V and 9.6uA b) Compute V1. Don't ignore the effect of Ans. 0.45V c) Compute Rout (look up the equation) Ans. 347kohms d) Compute Av, (look up the equation) Ans. -133V/V

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    Given: VTH = 0.4V for NMOS VTH = -0.4V for PMOS unCox = 200uA/V2 upCox = 100uA/V2 a) Compute the DC current ID. Assume = 0 Assume the mosfets are saturated. Ans. 40uA b) Compute the DC voltage VGS2. Ans. 0.44V c) What is the highest value that vo can have while keeping the mosfets saturated? Ans. 1.7V d) What is the lowest value that vo can have while keeping the mosfets saturated? Ans. 0.39V

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    9.33. Due to a manufacturing error, a CMOS cascode amplifier has been configured as shown in Fig. 9.58. Calculate the voltage gain of the circuit. Figure 9.58

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