Based on the common source amplifier circuit shown in Fig. Q3a, suppose a limited voltage supply VDD is imposed such that only a single load is allowed to insert between VDD and VOUT. (i) Choose the type of load such that the small signal voltage gain is a weak function of PVT. (2 Marks) (ii) Sketch the small signal model circuit based on Q3a)(i), assuming λ = 0. (3 Marks) (iii) Deduce an equation representing the voltage gain based on Q3a)(ii). (3 Marks) (iv) Identify the design trade-offs of the circuit. (6 Marks)
The Figure below shows a MOSFET amplifier biased by a constant-current source. Assume that the values of I and RD are such that the MOSFET operates in the saturation region. The input signal vi is coupled to the source terminal by utilizing a large capacitor Cci. Similarly, the output signal at the drain is taken through a large coupling capacitor Cc2. Find the input resistance Rin and the voltage gain Av. Neglect channel-length modulation. (Note: No numerical values are provided)
For the n-channel MOSFET circuit below the gate measured DC gate voltage is 3V as shown. You are given kn = 4mA/V2, VA = ∞, and Vt = 1V. a) Calculate the DC drain voltage, VD. b) Calculate the DC current out of the source, IS. c) What is the small signal transconductance parameter, gm.