The circuit shown in Figure 4 is a logic function ‘F’ implemented using NMOS transistors with the following parameters: (Given: Vt = 1V and K = 0.5 mA/V2 , RL = 20 kΩ, VDD = 10 V ); If the logic levels for the inputs ‘C & D’ are given as 10 V and 0 V for logic ‘1’ and ‘0’ respectively 1. Derive the truth table for function ‘F’ indicating the transistors’ mode of operation. (Fill in the table below) 2. Verify the mode of operation for the transistors at every row in the truth table 3. State the equivalent logic gate of ‘F’ Figure 4 Logic Function ‘F’ using NMOS Transistor Input ‘C’ logic Value Input ‘D’ logic Value M1 mode M2 mode ‘F’ Logic Value (‘1’ or ‘0’) ‘F’ Voltage Value [V]
Your friend D. G. Tully is very excited because she figured out a way to transmit digital information wirelessly via a light signal. However, she does not know digital circuits so she comes to you for help. She shows you the circuit in figure 7. The circuit contains a Light dependent Resistor (LDR), which changes its resistance from Rlow when light is shone on it and Rhigh in the dark. (a) Configuration A (b) Configuration B Figure 7: LDR Receiver (c) If you want the lowest output of the inverter to be 0.5 V lower than the lowest voltage at the input, what would the value of RL be given that RON = 1kΩ.
Consider the following circuit which uses a 0.25 micron process. Find the transistor sizes (W and L values) such that the total area is minimized and the low-to-high and high to low propagation delays do not exceed 2.5 µs for any input combination. You may neglect the effect of self capacitances on the propagation delays. It is known that an NMOS transistor with W/L = 1.5 would have an on-resistance of 17 kΩ and a PMOS transistor with W/L = 1.5 would have an on-resistance of 35 kΩ, in this process.
The value of RD of the following circuit has been chosen to establish a drain voltage of 0.1 V. What is the effective resistance between drain and source of the MOSFET of the figure? Assume that, the threshold voltage is 0.6 V, mobility of electrons is 600 cm2/V.s, gate capacitance per unit area is 2.5×10−3 F/m2, channel length and width are 0.8 µm and 4 µm, respectively. Figure for question no. 2
For the given NMOS transistor as shown in below figure, Given Vth = 0.85 V Find (i) transconductance (ii) VDS (iii) VGSQ & overdrive voltage (iv) Verify the device is in saturation or not?
For the amplifier shown develop an expression for the voltage gain in the s-domain. Crudely graph a straight line approximation for the Bode Plot of |Vo/Vin| as a function of frequency. You may assume that ro >> Rd.
For the circuits shown: 1. a) Derive the s-domain transfer function, [10 points] 2. b) Using bode approximations (straight-line), plot by hand both the magnitude and phase response of the transfer function. Use the semilog template posted below. [10 points] 3. c) Plot the magnitude and phase of the transfer function in either Python or Matlab. Include the code used to generate the plots. [10 points] 4. d) Simulate the magnitude and phase response using Multisim. [10 points] 5. e) Report the values for DC gain, gain at infinite frequency, the location of poles and zeros for each transfer function, and indicate whether the circuit is a low-pass, high-pass, or band-pass filter. [10 points] Hint: s = jω = j2πf, where f = frequency in Hz (cycles/second) and ω = angular frequency in rad/sec
The voltage gain of an amplifier is described in the s-domain as shown below. Av(s) = -gm R1/R1 + 1/sC1 (R2 || sC2) a) Determine the pole(s) if any. Show your work! b) Determine the zeros(s) if any. Show your work! c) Crudely graph a straight line approximation for the Bode Plot of the voltage gain as function of frequency. Label key values and slopes. You may make reasonable approximations for the relative values of poles and zeros. In other words, you may assume that a particular pole/zero is larger than another, and that choice is yours.
Consider the amplifier shown below along with a description of its voltage gain in the s-domain (Av(s)) a) Determine expressions for the poles and zeros, if any. Show your work! You may leave your answers as a function of Rb instead of R1||R2. b) Crudely graph a straight line approximation for the Bode Plot of |Vo/Vin| as a function of frequency. If there are multiple poles you may assume that the one at the output (containing terms at the output: RL, Rd, C2 ) is larger. Av(s) = -gm Rb/Rb + 1/sC1 (Rd||(1/sC2 + RL)) Where: Rb = R1||R2 and the notation Z1(s)||Z2(s) denotes that impedances Z1 and Z2 are in parallel